LM3S801-EQN50-C2T — Stellaris ARM Cortex-M3 MCU, 50 MHz, 64 KB Flash, 48-LQFP
Texas Instruments Stellaris LM3S800 series ARM Cortex-M3 MCU; 50 MHz, 64 KB Flash, 8 KB RAM; 36 I/O with I²C, SPI, SSI, UART/USART; 3.3 V nominal supply; -40°C to 105°C operating temperature; 48-LQFP (7×7 mm) in tape-and-reel packaging.
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Specifications
| Parameter | Value |
|---|---|
| Series | Stellaris® ARM® Cortex®-M3S 800 |
| Mounting type | Surface Mount |
| Oscillator type | Internal |
| Program memory type | FLASH |
| Voltage - supply (Vcc (Vdd)) | 3V ~ 3.6V |
| Operating temperature | -40°C~105°C(TA) |
| Speed | 50MHz |
| Package | Tape & Reel (TR) |
| RAM size | 8K x 8 |
| Core size | 32-Bit Single-Core |
| Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Connectivity | I²C, Microwire, QEI, SPI, SSI, UART/USART |
| Number of i (O) | 36 |
| Core processor | ARM® Cortex®-M3 |
| Case | 48-LQFP |
| Program memory size | 64KB (64K x 8) |
Frequently asked questions
What replaces the LM3S801-EQN50-C2T if my design needs a drop-in?
No official L* successor order code appears in this ledger. TI's Stellaris line was succeeded by the Tiva C Series (TM4C family). A pin-compatible TM4C substitute will require a cross-reference search against the specific LM3S801 variant and a firmware regression cycle — the 48-LQFP footprint is shared, but peripheral multiplexing and voltage domains differ across families and must be verified.
Can I use this part at 85 °C ambient without brown-out reset tripping?
The part is rated for 105 °C TA maximum, so 85 °C ambient leaves 20 °C of headroom. Whether brown-out reset fires at a given load depends on the board's 3.3 V rail droop under dynamic I/O current — the on-chip brown-out detect threshold and the supply decoupling topology govern the trip point, not the ambient alone. Thermal profiling of the specific board layout is the appropriate verification step at that ambient.
Is the LM3S801-EQN50-C2T pin-compatible with the LM3S608 or LM3S811 for a shared daughtercard footprint?
The LM3S801 uses a 48-LQFP at 36 I/O, which is a common pin count across LM3S800 series variants. Pin-compatible siblings exist in the same package — but the VCC/AVSS pinout and peripheral mux assignments must be confirmed against the specific variant datasheet before assuming footprint interchangeability. The EQN50 speed grade suffix also affects the power budget and must match the target design's supply design.