Skip to main content
Texas Instruments CDCEL937QPWRQ1 — Clock & Timing ICs

CDCEL937QPWRQ1 Clock Synthesizer, 230MHz, AEC-Q100, 20-TSSOP

MPNCDCEL937QPWRQ1
Active

Texas Instruments CDCEL937QPWRQ1, Clock/Frequency Synthesizer, PLL with Bypass, 230 MHz max, 1:7 LVCMOS fan-out, AEC-Q100, 20-TSSOP.

$3.3900Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CDCEL937QPWRQ1 specifications
ParameterValue
TypeClock/Frequency Synthesizer
SeriesAutomotive, AEC-Q100
MountingSurface Mount
Supply voltage1.7V ~ 1.9V
Frequency - max230MHz
Operating temperature-40°C~125°C
PLLYes with Bypass
InputLVCMOS, Crystal
OutputLVCMOS
PackageTape & Reel (TR); Cut Tape (CT)
Case20-TSSOP (0.173\", 4.40mm Width)
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output1:7
Differential - Input:OutputNo/No

Product details

Clock-tree fit and fan-out

The CDCEL937QPWRQ1 is a clock/frequency synthesizer from Texas Instruments, part of the CDCEL937 base family. It accepts either an LVCMOS reference or a crystal input and generates up to seven LVCMOS clock outputs from a single PLL core that can be bypassed for a clean feed-through path. The 1:7 input-to-output ratio means one reference clock fans out to seven synchronized copies, each capable of running up to 230 MHz. The PLL-bypass mode lets the input clock pass through unmodified when jitter-sensitive paths need the raw source rather than a synthesized frequency.

Automotive temperature and qualification

AEC-Q100 qualification means it has passed the stress tests and reliability monitors required for Tier-1 PPAP submissions — the part ships with the grade documentation a production ECU needs. The supply rail is 1.7V to 1.9V, a narrow window typical of low-voltage clock generators.

Active lifecycle and sourcing

The tape-and-reel packaging (also available as cut tape) suits both high-volume pick-and-place and prototype builds. Store the reels in a dry cabinet — the MSL rating for 20-TSSOP is typically MSL-1 or MSL-2, but the moisture-barrier bag seal should be verified before reflow.

Frequently asked questions

What is the maximum output frequency of CDCEL937QPWRQ1?

The maximum output frequency is 230 MHz. The PLL can be bypassed to pass the input clock through at its native frequency without synthesis.

What compliance documentation does Texas Instruments provide for CDCEL937QPWRQ1?

Texas Instruments provides RoHS and REACH compliance documentation for the CDCEL937QPWRQ1. The AEC-Q100 qualification report is available through the TI quality portal.