230 MHz PLL clock synthesizer for 1.8V logic domains
The CDCEL913PWR is a single-PLL clock synthesizer from Texas Instruments that takes an LVCMOS or crystal input and delivers three LVCMOS outputs at up to 230 MHz. The PLL includes a bypass mode (Yes with Bypass), which lets the reference clock pass through unmodified — useful for system test, low-jitter paths, or when the PLL must be disabled during a specific power sequence. The 1:3 input-to-output ratio means a single reference fans out to three independent synthesized clocks, each programmable via the VCXO interface.
The LVCMOS I/O levels are 1.8V compatible, so no level translation is needed when connecting to a 1.8V FPGA bank or a low-voltage microcontroller.
The base product number CDCEL913 covers the family; the PWR suffix denotes the 14-TSSOP package in tape-and-reel or cut-tape format. RoHS3 compliant, with no exemptions that would restrict EU or UKCA market entry.