PLL clock synthesizer with 300 MHz ceiling and six outputs
The CDCE706PW is a PLL frequency synthesizer from Texas Instruments that takes a single LVCMOS or crystal reference and generates up to six LVCMOS clock outputs, each programmable up to 300 MHz. The internal PLL includes a bypass path — useful when you need a clean reference clock during system bring-up or when the PLL itself is not required and you want to pass the input straight through.
1:6 fan-out saves board space and buffer count
With a 1:6 input-to-output ratio, this single chip replaces a PLL plus a separate clock fan-out buffer. The six LVCMOS outputs are individually programmable, so you can assign different frequencies to different loads — a common need in multi-rail FPGA or processor clock trees. The 300 MHz maximum covers gigabit Ethernet MAC clocks, DDR memory reference clocks, and high-speed ADC sampling clocks.
Industrial temperature rating and supply range
The 20-TSSOP package (4.40 mm wide) is a standard footprint that rework techs can swap with a fine-tip iron; no hot-air station required.