Cortex-M4 at 50 MHz — what the flash and RAM actually hold
The MK11DX128AVLK5: After the boot vector, the HAL, and the RTOS kernel, you have roughly 80 KB of flash and 20 KB of RAM for application code and data. The 4 KB EEPROM on-chip handles non-volatile parameter storage without wearing the flash. The 32-bit single-core architecture and the internal oscillator mean the part boots without an external crystal — the FLL locks to the internal reference, and the clock tree divides down to the bus and flash clock domains. Step through the boot ROM to confirm the trim value; the factory-calibrated oscillator is accurate enough for UART framing at 115200 baud.
80-pin LQFP — the footprint and what it demands
The 24-channel 16-bit ADC shares pins with GPIO — the pin-mux register map in the reference manual decides which function wins at reset. The DMA controller can service the ADC result registers without CPU intervention, keeping the M4 free for control loops. Connectivity includes I²C, SPI, UART/USART, and IrDA — enough for a sensor hub or a motor-drive comms gateway. The I²S peripheral handles audio data streaming; the PWM timers drive half-bridge FETs directly when paired with an external gate driver.