The DSPB56374AFC: RoHS3 compliant (ROHS3 Compliant per the manufacturer's declaration), with no exemption flags in the compliance record.
Core architecture and memory map
Audio-optimized DSP core clocked at 150 MHz, with 54 kB on-chip RAM for coefficient buffers and delay lines, plus 84 kB mask ROM for fixed algorithm kernels or boot code. Dual-voltage supply: 1.25 V core rail and 3.30 V I/O rail. The 1.25 V core keeps dynamic power in check at 150 MHz; the 3.30 V I/O interfaces directly with common audio codecs and serial peripherals without external level translation.
Peripheral interface suite
Four serial interfaces — Host Interface, I²C, SAI (Serial Audio Interface), and SPI — cover the typical audio signal chain: SAI for codec data streaming, I²C for control registers, SPI for boot flash or co-processor communication, and the Host Interface for a system controller or USB bridge.
Package and temperature grade
80-lead LQFP, 14×14 mm body (Supplier Device Package 80-LQFP 14×14). Suitable for pro-audio racks, automotive infotainment (non-engine-bay), and outdoor telecom equipment where the enclosure stays below 85°C.