12-bit ripple counter with 79 MHz clock ceiling
The 74HCT4040D/AU118 is a 12-stage binary ripple counter from NXP's 74HCT family. It counts up on the negative edge of the clock input, with a maximum count rate of 79 MHz — meaning the internal flip-flop chain toggles reliably at that frequency, and the Q12 output transitions at 79 MHz ÷ 2^12 ≈ 19.3 kHz, giving a usable division ratio for timing or frequency synthesis. An asynchronous reset (active high) clears all 12 bits immediately, independent of the clock state — useful for initializing the counter to zero before a measurement cycle or for synchronizing multiple counters on the same board.
Supply and temperature envelope for industrial logic
Packaged in a 16-SOIC with 3.90 mm body width (supplier package 16-SO). The 1.27 mm pin pitch is layout-friendly — two-layer boards handle the fan-out without vias, and the body size fits standard SOIC-16 footprints.