Schmitt-trigger inverter with three independent channels
The NXP 74HC3G14DP/S470125 packs three independent Schmitt-trigger inverter gates into an 8-TSSOP package, each with its own input and output. The Schmitt-trigger action on every input provides clean hysteresis between the low-level threshold (0.3V to 1.2V) and high-level threshold (1.5V to 4.2V), rejecting noise on slow or noisy signal edges that would cause a standard inverter to oscillate.
Propagation delay and output drive at 6V
Maximum propagation delay is 21 ns at 6V with a 50 pF load. This sets the data-rate ceiling: at 6V the gate toggles cleanly up to roughly 23 MHz before the output rise time eats into the timing budget. The 5.2 mA symmetrical output drive (source and sink) is enough to charge the input capacitance of three downstream 74HC loads while keeping the edge rate within the datasheet limit. Quiescent current sits at 1 µA maximum, so the three gates together draw negligible supply current when the outputs are static. This matters in battery-backed or always-on domains where every microamp counts — the part idles at the same current as a single-gate 74HC1G14 but gives you three channels in one footprint.
Active lifecycle and sourcing posture
No pin-compatible second source is documented on this order code, but the 74HC family has broad parametric equivalents from other manufacturers — confirm the package and threshold levels before substituting.