50 MHz Cortex-M0 — what the clock buys you
The LPC11U22FBD48/30QL runs the ARM Cortex-M0 core at 50 MHz. That clock rate, combined with a single-cycle multiply and a two-stage pipeline, gives you deterministic interrupt latency for USB polling and tight control loops. For a USB-to-UART bridge or a simple HID controller, 50 MHz is enough headroom to keep the firmware lean without an external oscillator — the internal oscillator is rated for this part.
Memory map — what fits and what doesn't
16 KB Flash and 8 KB SRAM. That's enough for a USB CDC class driver, a bootloader, and a modest application — think a sensor hub or a keypad controller. The 1 KB EEPROM is the standout: it stores calibration constants or configuration parameters without wearing the Flash or needing an external serial EEPROM. If your firmware image pushes past 16 KB, you need the higher-density LPC11U2x or LPC11U3x siblings.
NXP lists this part as Active. ROHS3 compliant per. No EOL notice or last-time-buy window on record. For new designs, the LPC11Uxx series remains a supported portfolio; the 48-LQFP package is a standard footprint with broad second-source availability for the package itself.
