50 MHz Cortex-M0 — enough headroom for USB and protocol handling
The LPC11U12FBD48/201,: The 50 MHz core speed on the Cortex-M0 gives you roughly 50 MIPS of single-cycle integer throughput. That is enough to run a USB CDC/ACM virtual COM port at full speed without external PHY, while leaving cycles for polling the ADC or servicing a SPI flash.
USB connectivity and serial interfaces
The USB full-speed device controller supports control, bulk, interrupt, and isochronous transfers.
Memory sizing — what fits in 16 KB Flash and 6 KB SRAM
16 KB of Flash is enough for a USB HID class driver, a bootloader, and application logic for a simple sensor node or a keypad controller. The 6 KB SRAM handles USB endpoint buffers plus a modest data stack.