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Micron Technology MT46V16M16CY-5B IT:M — Discrete Semiconductors

Micron MT46V16M16CY-5B IT:M 256Mbit DDR SDRAM, 200 MHz

MPNMT46V16M16CY-5B IT:M
End of Life

Micron Technology DDR SDRAM, 256Mbit, 200 MHz, 16M x 16, 700 ps access, -40 to 85°C, 60-TFBGA, Tray.

$7.54Ref. price · indicative, final on quote
Packaging60-TFBGA
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

MT46V16M16CY-5B IT:M specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Voltage2.5V ~ 2.7V
Frequency200 MHz
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologySDRAM - DDR
Access time700 ps
Memory size256Mbit
Memory formatDRAM
Case60-TFBGA
Memory organization16M x 16
Write cycle time - word, page15ns

Product details

Active DDR SDRAM for industrial memory bus designs

The MT46V16M16CY-5B IT:M: The parallel memory interface and 2.5V to 2.7V supply range place this squarely in the original DDR voltage domain — not DDR2 or later generations. At 200 MHz the data rate is 400 MT/s per pin, and the 15 ns write cycle time per word or page sets the minimum interval for back-to-back write commands.

Industrial temperature grade and what it buys you

That means the DRAM core and I/O buffers are characterized for cold-start at -40°C and for the self-heating plus ambient ceiling at 85°C — the refresh rate and timing margins hold across that span without derating. For a system that lives in an outdoor cabinet or an unheated factory bay, the industrial grade eliminates the need for supplemental heating or aggressive forced-air cooling that a commercial 0-70°C part would require.

Package footprint and board-fit note

Surface-mount reflow requires a stencil aperture matched to the ball diameter and a profile that keeps the peak below 260°C for lead-free solder. The tray packaging is standard for BGA devices in production volumes; the parts ship in JEDEC trays compatible with pick-and-place machines.

Sourcing posture and BOM fit

The 16M x 16 organization makes this a direct fit for 16-bit wide memory buses. For a 32-bit bus, two of these in parallel match the 32-bit interface width; the 256 Mbit density serves applications needing 32 MB of DDR SDRAM.

Frequently asked questions

What is the operating temperature of MT46V16M16CY-5B IT:M?

This covers outdoor and unheated industrial environments without derating.

Is MT46V16M16CY-5B IT:M RoHS compliant?

Yes, it is RoHS3 compliant, meeting the EU RoHS directive without exemptions for lead in solder or other restricted substances.

What is the memory organization of MT46V16M16CY-5B IT:M?

The memory is organized as 16M words by 16 bits (16M x 16), for a total density of 256 Mbit. The parallel interface addresses each 16-bit word on the data bus.