350 MHz HCSL clock source — MEMS vs quartz trade-offs
Its HCSL output is the same differential signalling used in PCIe reference clocks — the 350 MHz frequency lands it in high-speed SerDes, FPGA transceiver, or networking PHY applications where a quartz oscillator at that frequency would require a PLL multiplier stage and external load capacitors. Supply voltage spans 2.25 V to 3.63 V, so the same BOM line works across 2.5 V and 3.3 V rails without a separate regulator or level translator — the oscillator draws 40 mA typical (max) when enabled, and 23 mA typical in disable mode with the output tri-stated.
Microchip lists the DSC1224CI3-350M0000 as Active.
