MEMS XO at 33 MHz — why AEC-Q100 matters
Output is CMOS, which directly interfaces with the clock input of most MCUs, SoCs, and FPGAs without external level translation.
Frequency stability and output control
Frequency stability is ±50 ppm, which includes initial tolerance, temperature drift, and aging. For a 33 MHz clock, ±50 ppm translates to ±1.65 kHz of possible frequency error — well within the tolerance for UART baud-rate generation, SPI timing, and most MCU PLL reference inputs. The part includes an Enable/Disable function on a dedicated pin. Maximum supply current is 27 mA typical when active, which is modest for a 33 MHz CMOS oscillator. The 6-VDFN package measures 7.00mm x 5.00mm with a seated height of 0.90mm, fitting standard surface-mount assembly processes.