125 MHz LVDS clock source with MEMS reliability
The DSC1203DL2-125M0000 is a 125 MHz LVDS oscillator built on a MEMS resonator — no quartz crystal inside, so it handles the shock and vibration that would pull a quartz oscillator off frequency. LVDS output pairs directly with FPGA clock inputs, SERDES reference pins, and gigabit Ethernet PHYs without external level translation.
Standby power-down for battery duty cycling
The Standby (Power Down) function drops supply current to 5 µA max when the enable pin is pulled low — useful for battery-operated gear that only needs the 125 MHz clock during active transmit/receive windows. Active current is 32 mA typical at 125 MHz; the 2.5V to 3.3V supply range lets it run from a common 3.3V or 2.5V rail without an extra regulator.