167.7722 MHz LVDS MEMS XO for high-speed clock trees
For a 167.7722 MHz carrier, ±25 ppm stability keeps the frequency deviation within the holdover budget for most Ethernet PHY reference clocks without external trimming. Supply voltage accepts 2.5V to 3.3V, so the same part can be used on a 2.5V FPGA bank or a 3.3V clock fanout buffer without a separate LDO.
No official successor or cross-reference has been issued, so the BOM position is stable as long as the product lifecycle continues. The 6-VDFN package (3.20 mm x 2.50 mm x 0.90 mm seated height) is a standard MEMS oscillator footprint. The small land pattern requires a controlled solder-paste stencil aperture to avoid bridging. The part is supplied in Tube per the standard packaging option.