128 Mbit NOR flash for code-shadow or data-logging
The Infineon S29GL128S90DHI013 is a 128 Mbit parallel NOR flash from the GL-S series, organized as 8 M x 16 bits. With a 90 ns access time, random reads complete in under 100 ns from the address transition — this sets the upper bound on direct-execute (XiP) performance for a CPU fetching instructions from the flash bus. The parallel interface means the full 16-bit data word is available on each read cycle, unlike serial flash which serializes the word across multiple clock edges.
Supply and temperature fit for industrial systems
Write cycle time is 60 ns for word and page programming — the page buffer allows multiple sequential writes at that rate before the internal program cycle locks the array.
Package and board integration
Supplied in a 64-ball FBGA package (9x9 mm) — the 0.80 mm ball pitch is routable on a 4-layer PCB without blind vias.