The CY7C419-15VXC: Asynchronous FIFO memory organized 256 words by 9 bits, giving 2.25 Kbit of buffer depth. Unidirectional data transfer between two clock domains. Key features include a 15 ns access time, a maximum data rate of 50 MHz, and retransmit capability for resending a block of data without re-initializing the FIFO pointers. It operates from a 4.5 V to 5.5 V supply and draws up to 65 mA.
15 ns access time allows valid data on the output bus within 15 ns of the read enable strobe. Maximum data rate is 50 MHz.
Marked Obsolete by Cypress (now Infineon). No direct pin-compatible replacement listed.