Organized as 1M x 36, it delivers back-to-back read and write bursts without dead cycles — the key feature for high-throughput packet buffers in networking gear and cache in compute subsystems. The 1.7 V to 1.9 V core supply and 165-ball FBGA package (13x15 mm body) target dense, high-speed PCB layouts where signal integrity and timing closure are the constraints.

Infineon CY7C2270KV18-400BZXC 36Mbit DDR II+ SRAM, 400 MHz
Infineon CY7C2270KV18-400BZXC, 36Mbit SRAM - Synchronous, DDR II+, 400 MHz, 1.7V ~ 1.9V, 165-LBGA, 0°C ~ 70°C.
Specifications
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 1.7V ~ 1.9V |
| Clock frequency | 400 MHz |
| Memory interface | Parallel |
| Operating temperature | 0°C ~ 70°C (TA) |
| Package | Tray |
| Technology | SRAM - Synchronous, DDR II+ |
| Memory size | 36Mbit |
| Memory format | SRAM |
| Case | 165-LBGA |
| Memory organization | 1M x 36 |
Product details
Frequently asked questions
Is CY7C2270KV18-400BZXC obsolete?
Yes, this part is in Last Buy status — the manufacturer has ended production and the final ordering window is active. After that, only surplus inventory will be available through independent channels.
What is the replacement for CY7C2270KV18-400BZXC?
No official replacement order code is listed in the lifecycle record. For a pin-compatible alternative, you would need to cross-reference the 165-FBGA footprint and DDR II+ interface with other Infineon (formerly Cypress) QDR SRAMs in the same density and speed grade — but no drop-in successor is confirmed.
What is the voltage range of CY7C2270KV18-400BZXC?
The supply voltage range is 1.7 V to 1.9 V, core only. The I/O voltage is not separately listed in this record, but QDR-II+ SRAMs typically run at HSTL or 1.8 V-compatible levels — verify the datasheet for the VDDQ rail.
What is CY7C2270KV18-400BZXC's listed package?
The package is a 165-ball LBGA (low-profile ball grid array), with a 13x15 mm body, surface-mount. The supplier device package is 165-FBGA.