The 550 MHz clock rate delivers back-to-back read and write operations on separate data ports, eliminating bus-turnaround dead cycles that standard SRAMs incur. That throughput matters for high-bandwidth packet buffers, network switch look-up tables, and cache memory in telecom line cards where every clock cycle counts.
Infineon CY7C2265KV18-550BZXC 36Mbit QDR II+ SRAM, 550 MHz
MPNCY7C2265KV18-550BZXC
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Infineon CY7C2265KV18-550BZXC, 36Mbit QDR II+ synchronous SRAM, 1M x 36, 550 MHz clock, parallel interface, 1.7V–1.9V supply, 165-FBGA (13x15 mm), 0°C–70°C commercial temperature.
$131.9400Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026
Specifications
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 1.7V ~ 1.9V |
| Clock frequency | 550 MHz |
| Memory interface | Parallel |
| Operating temperature | 0°C~70°C(TA) |
| Package | Tray |
| Technology | SRAM - Synchronous, QDR II+ |
| Memory size | 36Mbit |
| Memory format | SRAM |
| Case | 165-LBGA |
| Memory organization | 1M x 36 |
Product details
Frequently asked questions
What is CY7C2265KV18-550BZXC's package and temperature grade?
It comes in a 165-ball FBGA (13x15 mm) and is rated for commercial temperature range of 0°C to 70°C.
What is the memory organization of this SRAM?
Organized as 1M x 36 bits, giving 36 Mbit total density with a 36-bit wide data bus for high-throughput parallel access.