15 ns access time — timing closure for the 5V bus
15 ns access time governs the read-cycle window from address valid to data valid on the bus at 5V nominal.

Cypress CY7C199C-15ZXC, 256Kbit (32K x 8) asynchronous SRAM, 15 ns access time, parallel interface, 4.5V–5.5V supply, 28-TSSOP (0.465", 11.80mm Width) surface-mount package, 0°C to 70°C temperature range.
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 4.5V ~ 5.5V |
| Memory interface | Parallel |
| Operating temperature | 0°C ~ 70°C (TA) |
| Package | Bag |
| Technology | SRAM - Asynchronous |
| Access time | 15 ns |
| Memory size | 256Kbit |
| Memory format | SRAM |
| Case | 28-TSSOP (0.465\", 11.80mm Width) |
| Memory organization | 32K x 8 |
| Write cycle time - word, page | 15ns |
15 ns access time governs the read-cycle window from address valid to data valid on the bus at 5V nominal.
Yes, the CY7C199C-15ZXC is obsolete per Cypress's lifecycle status. No official successor has been announced for this exact order code.
The CY7C199C-15ZXC operates from a 4.5V to 5.5V supply. It is not designed for 3.3V systems.
No. The minimum supply voltage is 4.5V, so this part cannot be used in a 3.3V system without external level shifting on the bus.
The part is in a 28-TSSOP package (11.80 mm width), also listed as 28-TSOP I. It is a standard JEDEC pinout for 32K x 8 asynchronous SRAMs. The supplier device package is 28-TSOP I.