It clocks at 400 MHz on the parallel interface, delivering the high random-access throughput that QDR is known for — two data words per clock cycle on separate read and write ports. This part targets high-bandwidth, low-latency data buffering in networking equipment (switch fabrics, packet processors), test-and-measurement capture buffers, and high-end signal-processing pipelines where the bus must sustain back-to-back transactions without dead cycles.
At 400 MHz the QDR II+ interface delivers double-data-rate on each port.
EOL hot — sourcing reality for this part
Package and temperature — fit check
The 165-ball FBGA measures 15 x 17 mm. It is a surface-mount, tray-shipped device — no tape-and-reel option in the listing.