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Infineon Technologies CY7C1613KV18-300BZI — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C1613KV18-300BZI QDR II SRAM, 144Mbit, 300 MHz

MPNCY7C1613KV18-300BZI
Active

Infineon CY7C1613KV18-300BZI, QDR II synchronous SRAM, 144Mbit, 8M x 18, 300 MHz clock, parallel interface, 1.7V–1.9V supply, -40°C to 85°C, 165-ball FBGA (15x17 mm), tray.

Infineon Technologies CY7C1613KV18-300BZI datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CY7C1613KV18-300BZI specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage1.7V ~ 1.9V
Clock frequency300 MHz
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologySRAM - Synchronous, QDR II
Memory size144Mbit
Memory formatSRAM
Case165-LBGA
Memory organization8M x 18

Product details

300 MHz QDR II SRAM for high-throughput buffering

The Infineon CY7C1613KV18-300BZI is a 144 Mbit QDR II synchronous SRAM organized as 8M x 18 bits, clocked at 300 MHz. The QDR II architecture delivers two data words per clock cycle on separate read and write ports, eliminating bus-turnaround dead cycles that standard synchronous SRAMs incur.

Infineon lists the CY7C1613KV18-300BZI as Active. The 300 MHz speed grade is the fastest in the CY7C1613KV18 family, so if your design currently uses the 250 MHz variant, this part drops in at the same footprint and supply voltage with additional timing margin.

Frequently asked questions

Can I use CY7C1613KV18-300BZI as a replacement for CY7C1613KV18-250BZI?

Yes. The CY7C1613KV18-300BZI is the 300 MHz speed-grade variant of the same base product number CY7C1613. It shares the same 144 Mbit density, 8M x 18 organization, 1.7 V–1.9 V supply range, and 165-ball FBGA footprint as the 250 MHz version. The 300 MHz part offers higher clock frequency, so it is a drop-in replacement with additional timing margin for the same bus interface.

Is CY7C1613KV18-300BZI a QDR II SRAM?

Yes. The device is a synchronous QDR II SRAM, which provides separate read and write data ports and double-data-rate operation on each port.