72Mbit QDR II+ SRAM at 500 MHz
The CY7C1565KV18-500BZI is a 72Mbit synchronous SRAM organized as 2M x 36, clocked at 500 MHz on the QDR II+ bus interface. The 165-FBGA (13x15 mm) package uses a parallel memory interface — the 36-bit data bus at 500 MHz double-data-rate delivers 4.5 GB/s peak bandwidth, which is the figure that drives the FPGA or ASIC pinout and the board-layer count for signal routing.
Infineon lists the CY7C1565KV18-500BZI as Obsolete. Quantities are lot-specific; each RFQ is confirmed against current inventory, with date-code and traceability data provided at quote time.
Supply voltage and temperature grade
The core supply range is 1.7V to 1.9V — the 1.8V nominal rail is the common point, but the wider window allows the memory to share a 1.8V supply that droops under load without falling out of spec. The operating temperature floor of -40°C and ceiling of 85°C cover the industrial ambient envelope; the junction temperature under full 500 MHz toggling will be higher, so the system thermal design must keep the case below the 85°C ambient limit.