Obsolete — sourcing path for the CY7C1543KV18-400BZC
The 400 MHz clock transfers data on both edges of the clock, per QDR II+ architecture.
165-FBGA package and layout considerations
Housed in a 165-ball FBGA (13x15 mm) footprint, this is a surface-mount BGA package. The ball pitch and layout demand careful decoupling placement — the 1.7 V–1.9 V core rail is tight, and the 400 MHz clock edge needs low-inductance bypass capacitors within 2 mm of the BGA pads.
