72 Mbit QDR II SRAM — 200 MHz, 4M x 18 organization
The CY7C1513V18-200BZC is a 72 Mbit synchronous QDR II SRAM organized as 4M x 18 bits, clocked at 200 MHz. The QDR II architecture delivers independent read and write data ports on each clock edge — effectively doubling the data bandwidth compared to a single-port SRAM at the same frequency. The 1.7 V to 1.9 V core supply keeps the I/O swing low, reducing switching noise in a high-speed memory bus. The 165-ball FBGA package (15x17 mm) is the footprint you need to match on the board. Surface-mount only — no socket option.
Sourcing this obsolete SRAM — what to expect
Because the manufacturer has discontinued this order code, there is no official successor or pin-compatible drop-in from Infineon. Every unit we source comes from verified surplus inventory — we confirm the date code, package condition, and functional test results before it ships. Quoted to order against your BOM line; availability and current pricing confirmed at RFQ time.