72 Mbit synchronous SRAM for high-throughput buffers
The CY7C1480V25-200BZC from Cypress is a 72 Mbit synchronous SRAM organized as 2M x 36 bits, clocked at 200 MHz with a 3 ns access time. Typical applications include high-speed cache, network packet buffers, and telecom line-card data storage where wide-word bandwidth and low-latency random access are required.
200 MHz clock and 3 ns access — bus timing margin
The 200 MHz clock and 3 ns access time support back-to-back transactions on a synchronous bus. The 2M x 36 organization delivers 200 MHz x 36 bits peak bandwidth.
