72 Mbit NoBL SRAM — 167 MHz, 3.4 ns access, 1M x 72 organization
The NoBL architecture eliminates the dead cycle normally required when the bus turns from read to write, so back-to-back transactions hit full throughput without wait states — useful in high-bandwidth data-path designs like network switches, base stations, or FPGA frame buffers where every clock cycle counts.
That means new-production units are no longer available through the factory channel. For a board in production, the options are: buy from the surplus and broker market (where we source and quote to order), or qualify a replacement. The 1M x 72 organization and 209-ball FBGA footprint narrow the field of pin-compatible substitutes — a standard synchronous SRAM in the same package may not share the NoBL bus-turnaround behaviour, so the memory controller firmware may need adjustment.
Because the CY7C1474BV33-167BGCT is obsolete, we source it through our independent distribution network. If you are filling a repair or last-production-run BOM line, send the order code and target quantity — we will quote the best available stock from our multi-source supply chain.
