36 Mbit synchronous SRAM with NoBL flow-through
The NoBL architecture eliminates the dead cycle between read and write operations, letting the bus switch direction on consecutive clock edges without an idle turn-around cycle. This matters for designs that interleave read and write accesses — a network packet buffer or a cache line fill, for example — where every lost cycle costs throughput.
Industrial temperature grade and 100-pin LQFP
The 100-LQFP package (supplier device package 100-TQFP 14x20 mm) is a surface-mount, fine-pitch footprint.
Infineon lists the CY7C1462AV33-200AXI as obsolete. No last-time-buy window or official successor appears in the current record.
