36Mbit NoBL synchronous SRAM for high-throughput data paths
The Cypress CY7C1460KV25-167BZC is a 36 Mbit synchronous SRAM from the NoBL™ (No Bus Latency) family, organized as 1M x 36 and clocked at 167 MHz. It delivers a 3.4 ns access time, eliminating dead cycles on back-to-back reads and writes — a fit for high-bandwidth applications like network buffers, telecom line cards, and FPGA-based data acquisition where every bus cycle counts. The parallel interface runs on a 2.375V to 2.625V supply, placing it in the 2.5V logic domain common on mid-2000s designs.
Cypress lists the CY7C1460KV25-167BZC as obsolete.
The ball pitch and layout are standard for this density class; a board designed for a 165-ball BGA with 1 mm pitch will accept this part.