NoBL synchronous SRAM — 250 MHz pipeline
It clocks at 250 MHz with a 2.6 ns access time, eliminating the dead cycle between read and write turns that standard sync SRAMs require. That makes it a fit for high-throughput data buffers in networking equipment, DSP engines, and test instrumentation where back-to-back bus transactions must sustain full rate without wait states.
Package and supply
Housed in a 100-pin LQFP (14x20 mm body), surface-mount.
