18 Mbit synchronous SRAM for high-throughput data paths
The CY7C1386KV33-200AXCT is a 18 Mbit synchronous SRAM organized 512K × 36, clocked at 200 MHz with a 3 ns access time — the wide 36-bit word fits packet buffers, network switch look-up tables, and DSP coefficient stores that need a single-cycle read-modify-write across a 32-bit data bus plus parity or tag bits.
Last-buy lifecycle — plan the BOM migration
Infineon has placed the CY7C1386KV33-200AXCT into Last Buy status — the manufacturer's end-of-life notice is active, meaning the final procurement window is open and the part will not be available from the factory after the last-time-buy date.