The CY7C1383KVE33-133AXI: It belongs to Infineon's (formerly Cypress) synchronous SDR SRAM family, designed for high-speed cache and buffer applications where deterministic access latency matters. The 133 MHz clock rate and 6.5 ns access time mean the part can sustain pipelined reads and writes at the full bus speed — the access time is the latency from address to data valid, not the cycle time. For a 133 MHz bus (7.5 ns period), the 6.5 ns access leaves just 1 ns of setup margin at the controller, so the board-level trace delay and clock skew must be tightly controlled.
Infineon CY7C1383KVE33-133AXI SRAM, 18Mbit, 133MHz, 100-LQFP
MPNCY7C1383KVE33-133AXI
End of Life
Infineon Technologies CY7C1383KVE33-133AXI synchronous SDR SRAM, 18 Mbit, 133 MHz clock, 6.5 ns access, 1M x 18 organization, 3.135-3.6 V, 100-LQFP tray.
$36.4747Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026
Specifications
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 3.135V ~ 3.6V |
| Clock frequency | 133 MHz |
| Memory interface | Parallel |
| Operating temperature | -40°C ~ 85°C (TA) |
| Package | Tray |
| Technology | SRAM - Synchronous, SDR |
| Access time | 6.5 ns |
| Memory size | 18Mbit |
| Memory format | SRAM |
| Case | 100-LQFP |
| Memory organization | 1M x 18 |
Product details
Frequently asked questions
What is the memory organization and speed of CY7C1383KVE33-133AXI?
The device is organized as 1M x 18 bits (18 Mbit total), with a 133 MHz clock and a 6.5 ns access time.
What package does CY7C1383KVE33-133AXI come in?
The supplier device package is 100-TQFP (14x20). It is shipped in tray packaging.