18 Mbit synchronous SDR SRAM for 133 MHz bus applications
The Cypress CY7C1383KV33-133AXI is an 18 Mbit synchronous single-data-rate (SDR) SRAM organized as 1M x 18 bits, clocked at 133 MHz with a 6.5 ns access time.
The 133 MHz clock frequency sets the memory's peak throughput at 133 million 18-bit words per second. The 6.5 ns access time from clock edge to data valid is the number the hardware engineer enters into their FPGA or ASIC timing constraint.
The 100-LQFP package with 0.5 mm pitch needs a fine-pitch soldering profile; the 14x20 mm body fits a standard QFP footprint on a four-layer board with a ground plane underneath for signal integrity.
The base product number CY7C1383 covers multiple speed and package variants; the KV33-133AXI suffix locks in the 133 MHz speed grade, industrial temperature, and 100-LQFP package.