Infineon Technologies CY7C1383D-133AXI synchronous SDR SRAM, 18Mbit (1M x 18), 133 MHz clock, 6.5 ns access, 3.3 V, 100-TQFP, -40 to +85°C, tray.
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 3.135V ~ 3.6V |
| Clock frequency | 133 MHz |
| Memory interface | Parallel |
| Operating temperature | -40°C ~ 85°C (TA) |
| Package | Tray |
| Technology | SRAM - Synchronous, SDR |
| Access time | 6.5 ns |
| Memory size | 18Mbit |
| Memory format | SRAM |
| Case | 100-LQFP |
| Memory organization | 1M x 18 |
The CY7C1383D-133AXI: The parallel interface registers addresses and data on the rising clock edge, so the read latency is deterministic — the controller sees data at the bus exactly one cycle after the address is presented.
Infineon lists the CY7C1383D-133AXI as obsolete. No pin-compatible drop-in replacement is documented by the original manufacturer.
Yes, Infineon lists the CY7C1383D-133AXI as obsolete.
No official replacement or successor order code is documented by Infineon for the CY7C1383D-133AXI. The part is sourced through independent distribution — a functionally equivalent synchronous SRAM in the same package and speed grade would require a board-level qualification.
The access time is 6.5 ns from the rising clock edge at 133 MHz. This is the time from clock edge to valid data on the output bus under the specified load conditions.