Infineon CY7C1371D-133BGC, 18Mbit synchronous SDR SRAM, NoBL architecture, 133 MHz clock, 6.5 ns access time, 512K x 36 organization, 3.135V–3.6V supply, 0°C–70°C, 119-PBGA (14x22 mm), Tray.
| Parameter | Value |
|---|---|
| Series | NoBL™ |
| Memory type | Volatile |
| Mounting type | Surface Mount |
| Voltage | 3.135V ~ 3.6V |
| Frequency | 133 MHz |
| Memory interface | Parallel |
| Operating temperature | 0°C~70°C(TA) |
| Package | Tray |
| Technology | SRAM - Synchronous, SDR |
| Access time | 6.5 ns |
| Memory size | 18Mbit |
| Memory format | SRAM |
| Case | 119-BGA |
| Memory organization | 512K x 36 |
The Infineon CY7C1371D-133BGC is an 18 Mbit synchronous SDR SRAM with NoBL architecture. It sustains 133 MHz throughput on back-to-back transactions. Organized as 512K x 36, it has a 6.5 ns access time.
NoBL (No Bus Latency) eliminates the turnaround cycle between read and write operations, sustaining full 133 MHz throughput on consecutive transactions without dead cycles.
It is organized as 512K words by 36 bits, giving 18 Mbit of synchronous SDR SRAM.
The part is listed with a Tray package and standard commercial temperature grade. Specific RoHS/REACH compliance documentation should be requested at quote time — no such cert is pre-loaded in this listing.