NoBL™ synchronous SRAM — 18 Mbit at 250 MHz
It operates with a 250 MHz clock and delivers a 2.6 ns access time, enabling back-to-back read/write transactions without dead cycles on the bus.
2.6 ns access time — keeping the bus fed
The 2.6 ns access time and 250 MHz clock allow data delivery within one clock cycle.
