The CY7C1354C-166BGCT: For existing BOM lines, the part is sourced through independent distribution against an RFQ — availability and pricing confirmed at quote time, not held as standing stock.
Speed grade and bus width
This is a 9Mbit synchronous SRAM organized as 256K x 36. The 166 MHz clock rate and 3.5 ns access time place it in the mid-range speed bin of the NoBL family — the 3.5 ns access is the nominal figure from the datasheet, not the absolute-maximum rating. The 36-bit wide data bus suits systems that need a single-chip memory for a 32-bit data path plus parity or ECC bits without ganging multiple narrower parts.
Supplied in a 119-ball BGA with a 14 x 22 mm body. Tape & Reel packaging suits automated pick-and-place assembly.