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Infineon Technologies CY7C1329H-133AXC — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C1329H-133AXC 2Mbit Synchronous SRAM, 133 MHz

MPNCY7C1329H-133AXC
Last Buy

Infineon CY7C1329H-133AXC, 2Mbit Synchronous SDR SRAM, 64K x 32, 133 MHz clock, 4 ns access time, Parallel interface, 3.15V-3.6V supply, 0°C to 70°C, 100-TQFP (14x20 mm), Tray.

$6.5649Ref. price · indicative, final on quote
Infineon Technologies CY7C1329H-133AXC datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C1329H-133AXC specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage3.15V ~ 3.6V
Clock frequency133 MHz
Memory interfaceParallel
Operating temperature0°C ~ 70°C (TA)
PackageTray
TechnologySRAM - Synchronous, SDR
Access time4 ns
Memory size2Mbit
Memory formatSRAM
Case100-LQFP
Memory organization64K x 32

Product details

2 Mbit synchronous SRAM for high-throughput buffer memory

The Infineon CY7C1329H-133AXC is a 2 Mbit synchronous SDR (Single Data Rate) SRAM organized as 64K words by 32 bits. It clocks at 133 MHz with a 4 ns access time, making it suitable for cache memory, network packet buffers, and DSP local storage where deterministic read/write latency matters. The 32-bit wide data bus matches many processor and FPGA local memory interfaces without external muxing.

The 133 MHz clock rate supports back-to-back pipelined transactions at 133 million transfers per second on the parallel bus. The 4 ns access time from clock edge to data valid gives the controller a tight but workable setup/hold window at that speed.

Last Buy — plan the procurement window

This means Infineon has announced end-of-life and is accepting final orders for a limited period. Buyers should commit last-time-buy quantities now to cover production through the product's service life.

100-TQFP footprint and supply rails

Frequently asked questions

Is CY7C1329H-133AXC obsolete or end-of-life?

Yes, this part is in Last Buy status. Plan last-time-buy quantities now to cover your production needs.

What is the replacement for CY7C1329H-133AXC?

For new designs, consider a pin-compatible synchronous SRAM from another supplier in the same 100-TQFP footprint, or a bridge FPGA if the application can absorb the latency. Verify the clock speed, access time, and supply voltage match your bus timing.

What is the access time of CY7C1329H-133AXC?

The access time is 4 ns from clock edge to data valid, at a 133 MHz clock rate. This supports pipelined transactions at 133 million transfers per second on the 32-bit parallel bus.