256K x 18 synchronous SRAM at 133 MHz
The Infineon CY7C1327G-133AXIT is a 4.5 Mbit synchronous SRAM organized as 256K words by 18 bits. With a 133 MHz clock frequency and a 4 ns access time, this part is suited for high-throughput data buffering and cache applications where deterministic read/write latency is critical. The synchronous pipeline eliminates the address-to-data propagation uncertainty of asynchronous SRAM at these speeds.
100-TQFP package and board integration
The 100-TQFP (14x20) footprint is shared across the CY7C1327 family, so a single PCB layout can accommodate multiple density variants. The parallel memory interface requires 18 data lines plus address and control signals.
The Tape & Reel packaging indicates this variant is intended for automated pick-and-place assembly. The base product number CY7C1327 covers multiple speed and temperature grades; confirm the -133AXIT suffix matches the BOM's required clock frequency and operating range.