10 ns access time — bus timing headroom
For a 100 MHz bus (10 ns cycle), this SRAM can complete a read in one cycle with zero wait states, provided the controller's address-to-data setup time budget allows for the 10 ns window.
Package and footprint — 48-TSOP I on Tape & Reel
Housed in a 48-TFSOP (0.724", 18.40 mm width) package, the supplier device package is 48-TSOP I, a standard thin small-outline package for memory devices. The Tape & Reel (TR) shipping format is the production-reel option — 13-inch reel, typically 1 000 or 2 500 pieces per reel depending on the supplier's standard pack quantity.
