8 Mbit asynchronous SRAM — 12 ns access, 512K x 16 organization
The CY7C1051DV33-12BAXI is a 8 Mbit asynchronous SRAM organized as 512K words by 16 bits. The 12 ns access time and 12 ns write cycle time (word, page) make it suitable for moderate-speed cache, buffer, or scratchpad memory in embedded systems where the host bus can tolerate a 12 ns window.
