10 ns asynchronous SRAM for legacy 5V bus architectures
The CY7C1046D-10VXIT is a 4Mbit asynchronous SRAM organized as 1M × 4 bits, with a 10 ns access time and a 4.5 V to 5.5 V supply range.
A 10 ns access time means the SRAM can complete a read or write cycle in 10 ns from address valid.
