256K x 16 asynchronous SRAM with 10 ns access
The Infineon CY7C1041G30-10ZSXET is a 4 Mbit asynchronous SRAM organized as 256K words by 16 bits. It delivers a 10 ns access time across -40°C to 125°C.
A 10 ns access time means the SRAM presents valid data within 10 ns of the address being stable.
The TSOP II package is a standard JEDEC outline.
