4 Mbit asynchronous SRAM with 10 ns access
The CY7C1041G30-10BAJXET is a 4 Mbit asynchronous SRAM organized as 256K x 16 bits, with a 10 ns access time that sets the bus-cycle floor for the memory controller.
Housed in a 48-TFBGA (6x8 mm) package, the 0.5 mm ball pitch demands a 4-layer PCB for fan-out — two-layer boards will not route the inner balls cleanly. Supplied in Tape & Reel (TR) format, suitable for automated pick-and-place assembly.