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Infineon Technologies CY7C1041CV33-20ZSXAT — Memory (DRAM / SRAM / Flash / EEPROM)

CY7C1041CV33-20ZSXAT 4Mbit Async SRAM, 20 ns, 44-TSOP II

MPNCY7C1041CV33-20ZSXAT
Obsolete

Infineon (Cypress) CY7C1041CV33-20ZSXAT, 4Mbit asynchronous SRAM, 256K x 16 organization, 20 ns access time, parallel interface, 3V to 3.6V supply, -40°C to 85°C industrial temperature, 44-TSOP II package, Tape & Reel.

$6.9800Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C1041CV33-20ZSXAT specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage3V ~ 3.6V
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTape & Reel (TR)
TechnologySRAM - Asynchronous
Access time20 ns
Memory size4Mbit
Memory formatSRAM
Case44-TSOP (0.400\", 10.16mm Width)
Memory organization256K x 16
Write cycle time - word, page20ns

Product details

At 20 ns, this part keeps pace with a 50 MHz bus without wait states, assuming the controller's address-to-data setup budget accounts for the full 20 ns window. The parallel interface means every address and data line routes to the controller — no serialisation latency, but more board traces than a SPI or QSPI SRAM.

At the low end, 3.0V keeps the memory contents intact during a brown-out event down to that threshold.

44-TSOP II — rework and footprint reality

The 44-TSOP II package (0.400" body width, 10.16 mm) is a surface-mount gull-wing form factor that reworks cleanly with hot air — the leads are exposed, so alignment and solder-paste inspection are straightforward. The Tape & Reel shipping medium feeds pick-and-place without a tray change.

No last-time-buy window remains; procurement relies on broker and surplus inventory.

Frequently asked questions

Is the CY7C1041CV33-20ZSXAT obsolete?

Yes, Infineon (Cypress) has listed this part as Obsolete.

What is the access time of the CY7C1041CV33-20ZSXAT?

The access time is 20 ns.

What package does the CY7C1041CV33-20ZSXAT use?

It ships in Tape & Reel for automated assembly.

What is the memory organization of the CY7C1041CV33-20ZSXAT?

The memory is organized as 256K words by 16 bits, for a total of 4 Mbits. The 16-bit-wide data bus means a single read or write cycle transfers two bytes, which matches 16-bit microcontroller or processor buses directly.