12 ns access time — timing margin in a 3.3V bus
The CY7C1041CV33-12ZC: Access time is 12 ns. Write cycle time also 12 ns.
This part is officially marked obsolete by Infineon.
Storage and handling note
Package is Bag.

Infineon CY7C1041CV33-12ZC, 4Mbit (256K x 16) Asynchronous SRAM, 12 ns access time, Parallel interface, 3V to 3.6V supply, 0°C to 70°C, 44-TSOP II.
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 3V ~ 3.6V |
| Memory interface | Parallel |
| Operating temperature | 0°C ~ 70°C (TA) |
| Package | Bag |
| Technology | SRAM - Asynchronous |
| Access time | 12 ns |
| Memory size | 4Mbit |
| Memory format | SRAM |
| Case | 44-TSOP (0.400\", 10.16mm Width) |
| Memory organization | 256K x 16 |
| Write cycle time - word, page | 12ns |
The CY7C1041CV33-12ZC: Access time is 12 ns. Write cycle time also 12 ns.
This part is officially marked obsolete by Infineon.
Package is Bag.
Yes.