20 ns asynchronous SRAM — bus timing fit
The Cypress CY7C1041BNL-20VXC is a 4Mbit asynchronous SRAM organized as 256K x 16, with a 20 ns access time. This is a word-wide, parallel-interface memory intended for use as fast scratchpad, cache, or buffer in embedded systems that need deterministic read/write timing without refresh overhead. The 20 ns access time means the part can keep up with bus cycles down to 50 MHz without wait states, assuming the host memory controller meets the setup and hold windows. Supply range is 4.5V to 5.5V, which ties it to legacy 5V logic families — not a 3.3V-only bus.
Cypress no longer manufactures it, so new-stock procurement moves to the independent channel.
Housed in a 44-SOJ surface-mount package (44-BSOJ, 0.400" body width, 10.16 mm width).