1 Mbit asynchronous SRAM — 10 ns access, 3.3 V, industrial temp
10 ns access time — bus timing margin
The 10 ns access time determines how quickly data appears on the output after the address is presented.
Supply and temperature — fit for industrial 3.3 V designs
No level shifters are needed when interfacing with 3.3 V FPGAs, ASICs, or microcontrollers. Storage temperature exceeds the operating range, so the part can survive shipping and handling extremes without damage.
Package and footprint — 32-SOJ surface-mount
The 32-BSOJ package (0.400" body width, 10.16 mm) is a JEDEC-standard SOJ footprint with J-bend leads.
For BOM planning, this part presents no immediate obsolescence risk.
