The Infineon CY7C09179V-6AXC is a 288 Kbit synchronous dual-port SRAM organized as 32K x 9. It provides two independent ports with separate address, data, and control lines, allowing simultaneous read/write access from two bus masters without dead cycles — useful for shared-memory buffering between a DSP and an FPGA, or between two microcontrollers in a telecom line card. The 6.5 ns access time and 100 MHz clock rate keep bus turnaround tight, so the arbitration logic can run at full speed without wait states on either port.
288 Kbit density — what it fits
32K x 9 — the ninth bit is typically used for parity or a control flag.
Supply and temperature — deployment envelope
This part is marked Obsolete by the manufacturer. No last-time-buy date is on record.
