Infineon (formerly Cypress) no longer manufactures this 128Kbit asynchronous dual-port SRAM.
Access time is 25 ns, matching the write cycle time.
Dual-port architecture and 8K x 16 organization
This is a true dual-port SRAM — two independent ports with separate address, data, and control buses, each capable of simultaneous access to the same memory array. The 8K x 16 organization (128Kbit total) gives a 16-bit data path per port, sized for shared mailbox buffers, dual-processor scratchpad, or FIFO emulation where the two sides run asynchronous clocks. The parallel interface keeps the control logic simple — no serialisation overhead.
Supply and temperature — design-in constraints
The 100-TQFP (14x14 mm) package is a surface-mount footprint.